Example embodiments of the inventive concepts relate to semiconductor devices, methods of forming the semiconductor devices, and an electronic system including the semiconductor devices.
As the degree of integration of semiconductor devices increases, a distance between adjacent conductive patterns is reduced, a cross talk between the adjacent conductive patterns may occur, and a parasitic capacitance between the adjacent conductive patterns that are electrically separated by an insulating layer may be increased. For example, if the conductive patterns are bit lines of a memory device, a parasitic capacitance between the bit lines may impede the flow of electrical signals and may reduce a bit line sensing margin. Therefore, in order to reduce the parasitic capacitance between the adjacent conductive patterns, a spacer having a lower dielectric constant may be formed between the conductive patterns.